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1/14 june 2004 very low dropout voltage (0.25v typ.) dropout control flag very low quiescent current (typ. 90 ma in off mode, 500ma in on mode) output current up to 200 ma logic-controlled electronic shutdown output voltages of 3v, 3.3v, 5v, 8.7v, 12v internal current and thermal limit only 2.2f for stability available in 2% selection at 25c supply voltage rejection: 70db (typ.) description the l4987 is a very low drop regulator available in ppak. the very low drop-voltage (0.5v max at 200 ma) and the very low quiescent current make it particularly suitable for low noise, low power applications, and in battery powered systems. the input dump protection up to 40v makes it ideal for automotive applications. a shutdown logic control function is available (pin2, ttl compatible). this means that when the device is used as a local regulator, it is possible to put a part of the board in standby, decreasing the total power consumption. the regulator employs an output pin (open collector) providing a logic signal when the pass transistor is in saturation at low input voltage, this signal can be used to prevent the pop-up phenomenon in the car radio. in battery powered systems (the cellular phone, notebook) it is possible to use the flag to monitor the battery charge status through the dropout of the regulator. l4987 series very low drop voltage regulators with inhibit and dropout control flag schematic diagram ppak rev. 4
l4987 series 2/14 table 1: absolute maximum ratings absolute maximum ratings are those values beyond which damage to the device may occur. functional operation under these conditi on is not implied. table 2: thermal data figure 1: connection diagram (top view) table 3: ordering codes (*) available even in tape & reel. symbol parameter value unit v i dc input voltage 40 v i o output current internally limited p tot power dissipation internally limited t stg storage temperature range -40 to 150 c t op operating junction temperature range -40 to 125 c symbol parameter ppak unit r thj-case thermal resistance junction-case 8c/w r thj-amb thermal resistance junction-ambient 100 c/w type output voltage l4987cpt30 (*) 3.0 v l4987cpt33 (*) 3.3 v l4987cpt50 (*) 5.0 v l4987cpt87 (*) 8.7 v l4987cpt120 (*) 12 v
l4987 series 3/14 table 4: electrical characteristics of l4987cpt30 (refer to the test circuits, v i = 6v, i o = 5ma, t j = 25c, c i = 0.1 f, c o = 2.2 f unless otherwise specified) symbol parameter test conditions min. typ. max. unit v o output voltage i o = 200 mav i = 6 v 2.94 3 3.06 v i o = 200 mav i = 6v t j =-40 to 125c 2.88 3.12 v i operating input voltage i o = 200 ma 3.62 18 v i out output current limit 250 a ? v o line regulation v i = 4.3 to 18 v i o = 0.5 ma 2.4 14 mv ? v o load regulation v i = 4.1 v i o = 0.5 to 200 ma 3 20 mv i d quiescent current on mode v i = 4.3 to 18 v i o = 0 ma 0.7 1 ma v i = 4.3 to 18 v i o = 200 ma 1.5 6 off mode v i = 12 v 90 180 a svr supply voltage rejection i o = 5 ma v i = 5.3 1 v f = 120 hz 80 db f = 1 khz 75 f = 10 khz 60 v d dropout voltage i o = 200 ma 0.25 0.5 v i o = 200 ma t j =-40 to 125c 0.7 v il control input logic low t j = -40 to 125c 0.8 v v ih control input logic high t j = -40 to 125c 2 v i i control input current 10 a c o output bypass capacitance esr = 0.5 to 10 ? i o = 0 to 200 ma t j = -40 to 125c 210 f v fl control flag output low v i - v o < v cesat power, i fl = 6ma i o = 200ma 0.5 v i fh control flag output high leakage current v i > 3.62 v, v oh = 15 v 10 a
l4987 series 4/14 table 5: electrical characteristics of l4987cpt33 (refer to the test circuits, v i = 6.3v, i o = 5ma, t j = 25c, c i = 0.1 f, c o = 2.2 f unless otherwise specified) symbol parameter test conditions min. typ. max. unit v o output voltage i o = 200 mav i = 6.3 v 3.234 3.3 3.366 v i o = 200 mav i = 6.3 v t j =-40 to 125c 2.76 3.432 v i operating input voltage i o = 200 ma 4 18 v i out output current limit 250 a ? v o line regulation v i = 4.6 to 18 v i o = 0.5 ma 2.4 14 mv ? v o load regulation v i = 4.4 v i o = 0.5 to 200 ma 3 20 mv i d quiescent current on mode v i = 4.6 to 18 v i o = 0 ma 0.7 1 ma v i = 4.6 to 18 v i o = 200 ma 1.5 6 off mode v i = 12 v 90 180 a svr supply voltage rejection i o = 5 ma v i = 5.6 1 v f = 120 hz 80 db f = 1 khz 75 f = 10 khz 60 v d dropout voltage i o = 200 ma 0.25 0.5 v i o = 200 ma t j =-40 to 125c 0.7 v il control input logic low t j = -40 to 125c 0.8 v v ih control input logic high t j = -40 to 125c 2 v i i control input current 10 a c o output bypass capacitance esr = 0.5 to 10 ? i o = 0 to 200 ma t j = -40 to 125c 210 f v fl control flag output low v i - v o < v cesat power, i fl = 6ma i o = 200ma 0.5 v i fh control flag output high leakage current v i > 4 v, v oh = 15 v 10 a
l4987 series 5/14 table 6: electrical characteristics of l4987cpt50 (refer to the test circuits, v i = 8v, i o = 5ma, t j = 25c, c i = 0.1 f, c o = 2.2 f unless otherwise specified) symbol parameter test conditions min. typ. max. unit v o output voltage i o = 200 mav i = 8 v 4.9 5 5.1 v i o = 200 mav i = 8 v t j =-40 to 125c 4.8 5.2 v i operating input voltage i o = 200 ma 5.7 18 v i out output current limit 250 a ? v o line regulation v i = 6.3 to 18 v i o = 0.5 ma 3 20 mv ? v o load regulation v i = 3.6 v i o = 0.5 to 200 ma 3 20 mv i d quiescent current on mode v i = 6.3 to 18 v i o = 0 ma 0.7 1 ma v i = 6.3 to 18 v i o = 200 ma 1.5 6 off mode v i = 12 v 90 180 a svr supply voltage rejection i o = 5 ma v i = 7.3 1 v f = 120 hz 76 db f = 1 khz 71 f = 10 khz 58 v d dropout voltage i o = 200 ma 0.3 0.5 v i o = 200 ma t j =-40 to 125c 0.7 v il control input logic low t j = -40 to 125c 0.8 v v ih control input logic high t j = -40 to 125c 2 v i i control input current 10 a c o output bypass capacitance esr = 0.5 to 10 ? i o = 0 to 200 ma t j = -40 to 125c 210 f v fl control flag output low v i - v o < v cesat power, i fl = 6ma i o = 200ma 0.5 v i fh control flag output high leakage current v i > 5.85 v, v oh = 15 v 10 a
l4987 series 6/14 table 7: electrical characteristics of l4987cpt87 (refer to the test circuits, v i = 11.7v, i o = 5ma, t j = 25c, c i = 0.1 f, c o = 2.2 f unless otherwise specified) symbol parameter test conditions min. typ. max. unit v o output voltage i o = 200 mav i = 11.7 v 8.526 8.7 8.874 v i o = 200 mav i = 11.7 v t j =-40 to 125c 8.35 9.05 v i operating input voltage i o = 200 ma 9.55 18 v i out output current limit 250 a ? v o line regulation v i = 10 to 18 v i o = 0.5 ma 4 24 mv ? v o load regulation v i = 10 v i o = 0.5 to 200 ma 3 20 mv i d quiescent current on mode v i = 10 to 18 v i o = 0 ma 0.5 1 ma v i = 10 to 18 v i o = 200 ma 3 6 off mode v i = 12 v 90 180 a svr supply voltage rejection i o = 5 ma v i = 11 1 v f = 120 hz 71 db f = 1 khz 68 f = 10 khz 55 v d dropout voltage i o = 200 ma 0.3 0.5 v i o = 200 ma t j =-40 to 125c 0.7 v il control input logic low t j = -40 to 125c 0.8 v v ih control input logic high t j = -40 to 125c 2 v i i control input current 10 a c o output bypass capacitance esr = 0.5 to 10 ? i o = 0 to 200 ma t j = -40 to 125c 210 f v fl control flag output low v i - v o < v cesat power, i fl = 6ma i o = 200ma 0.5 v i fh control flag output high leakage current v i > 9.55 v, v oh = 15 v 10 a
l4987 series 7/14 table 8: electrical characteristics of l4987cpt120 (refer to the test circuits, v i = 15v, i o = 5ma, t j = 25c, c i = 0.1 f, c o = 2.2 f unless otherwise specified) symbol parameter test conditions min. typ. max. unit v o output voltage i o = 200 mav i = 15 v 11.76 12 8.874 v i o = 200 mav i = 15 v t j =-40 to 125c 11.52 9.05 v i operating input voltage i o = 200 ma 12.75 18 v i out output current limit 250 a ? v o line regulation v i = 13.5 to 18 v i o = 0.5 ma 5 30 mv ? v o load regulation v i = 13.5 v i o = 0.5 to 200 ma 3 20 mv i d quiescent current on mode v i = 13.5 to 18 v i o = 0 ma 0.5 1 ma v i = 13.5 to 18 v i o = 200 ma 3 6 off mode v i = 12 v 90 180 a svr supply voltage rejection i o = 5 ma v i = 14.5 1 v f = 120 hz 67 db f = 1 khz 64 f = 10 khz 51 v d dropout voltage i o = 200 ma 0.3 0.5 v i o = 200 ma t j =-40 to 125c 0.7 v il control input logic low t j = -40 to 125c 0.8 v v ih control input logic high t j = -40 to 125c 2 v i i control input current 10 a c o output bypass capacitance esr = 0.5 to 10 ? i o = 0 to 200 ma t j = -40 to 125c 210 f v fl control flag output low v i - v o < v cesat power, i fl = 6ma i o = 200ma 0.5 v i fh control flag output high leakage current v i > 9.55 v, v oh = 15 v 10 a
l4987 series 8/14 typical performance characteristics (unless otherwise specified t j = 25c, c i =c o =0.1 f) figure 2: output and flag voltage vs input voltage figure 3: output voltage vs input voltage figure 4: output and flag voltage vs input voltage figure 5: output voltage vs input voltage figure 6: output and flag voltage vs input voltage figure 7: output voltage vs input voltage
l4987 series 9/14 application hint of l4987cpt30 how to use the control flag the flag produces a logic "low" whenever the output drops out of regulation. an "out of regulation condition can result from: 1) low input voltage (v in v out + v drop ) 2) current limiting 3) thermal limiting figure 1 to 2 show the typical behavior of the output voltage and the control flag versus the input voltage and the temperature. no hysteresis is implemented; so the response of v out and v flag are the same either when the v in ramps up or down. the control flag is an open collector which requires an external pull-up resistor. this may be connected to the regulator output (figure 9) or some other supply voltage (figure 10). using the regulator output prevents an invalid "high" on the flag which occurs if it is pulled up to an external voltage while the regulator input voltage is reduced below about 2v (figure 12). concerning the pull-up resistor its value must be properly chosen as suggested below. when "low" as it is possible to see in figure 6 the control flag voltage is: v flag(low) = v ce = 0.5 = v supply - r pull x i fl v supply is chosen by design and, thus is known, while i fl must be at maximum 10ma. then 0.5v v supply - r pull x 10ma the minimum value of r pull , is, so, determined by the following equation: r pull(min) v supply - 0.5/10 ma regarding the maximum value of r pull note that its value depends of the type of logic used (cmos, ttl etc.), the transistor leakage current and the presence or not of a load on v flag . the following example shows how to determine the r pull max in the case of cmos logic, no load and 10a (for l4978 it is the maximum value of i fh ) of control flag leakage current. because of cmos logic: v flag(high) 2/3 v supply but: v flag(high) = v supply - r pull x i fh 2/3 v supply so, the maximum value is determined by the following equation: r pull(max) ( 1/3 v supply )/10 a figure 8: output and flag voltage vs input figure 9: flag voltage vs input
l4987 series 10/14 figure 10: test circuit figure 11: test circuit figure 12: equivalent output circuit figure 13: output and flag voltage vs input
l4987 series 11/14 dim. mm. inch min. typ max. min. typ. max. a 2.2 2.4 0.086 0.094 a1 0.9 1.1 0.035 0.043 a2 0.03 0.23 0.001 0.009 b 0.4 0.6 0.015 0.023 b2 5.2 5.4 0.204 0.212 c 0.45 0.6 0.017 0.023 c2 0.48 0.6 0.019 0.023 d 6 6.2 0.236 0.244 d1 5.1 0.201 e 6.4 6.6 0.252 0.260 e1 4.7 0.185 e 1.27 0.050 g 4.9 5.25 0.193 0.206 g1 2.38 2.7 0.093 0.106 h 9.35 10.1 0.368 0.397 l2 0.8 1 0.031 0.039 l4 0.6 1 0.023 0.039 l5 1 0.039 l6 2.8 0.110 ppak mechanical data 0078180-e
l4987 series 12/14 dim. mm. inch min. typ max. min. typ. max. a 330 12.992 c 12.8 13.0 13.2 0.504 0.512 0.519 d 20.2 0.795 n 60 2.362 t 22.4 0.882 ao 6.80 6.90 7.00 0.268 0.272 0.2.76 bo 10.40 10.50 10.60 0.409 0.413 0.417 ko 2.55 2.65 2.75 0.100 0.104 0.105 po 3.9 4.0 4.1 0.153 0.157 0.161 p 7.9 8.0 8.1 0.311 0.315 0.319 tape & reel dpak-ppak mechanical data
l4987 series 13/14 table 9: revision history date revision description of changes 22-jun-2004 4 v o min and v o max values in table 5, pag. 4 have been corrected.
l4987 series 14/14 information furnished is believed to be accurate and reliable. however, stmicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result f rom its use. no license is granted by implication or otherwise under any patent or patent rights of stmicroelectronics. specificati ons mentioned in this publication are subject to change without notice. this publication supersedes and replaces all information previously supplied. stmicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of stmicroelectronics. the st logo is a registered trademark of stmicroelectronics all other names are the property of their respective owners ? 2004 stmicroelectronics - all rights reserved stmicroelectronics group of companies australia - belgium - brazil - canada - china - czech republic - finland - france - germany - hong kong - india - israel - ital y - japan - malaysia - malta - morocco - singapore - spain - sweden - switzerland - united kingdom - united states. http://www.st.com

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